1. Field of the Invention
In association with miniaturization of and a reduction in the profile of an electronic component using an LSI, demand has recently arisen for miniaturizing an LSI package. A chip-scale package (CSP), which is identical in size with a semiconductor chip, has been developed.
2. Background Art
CSPs are classified into two types; that is, a CSP comprising a semiconductor chip electrically and mechanically connected to a printed board and a film carrier, with solder balls (bumps) being provided on the printed board and the film carrier as external terminals; and a CSP having neither a printed board nor a film carrier and comprising posts provided on respective electrode pads of a semiconductor chip, with solder balls being provided on the respective posts as external terminals after the semiconductor chip has been encapsulated with resin while the posts are held in a projecting manner.
FIG. 3 is a cross-sectional view of a conventional CSP of the latter type, wherein reference numeral 1 designates a semiconductor chip; 2 designates an electrode pad; 3 designates a protective dielectric layer; 4 designates a post as a connecting conductor; 5 designates sealing resin; 6 designates a bump as an external terminal; and 7 designates a coating layer.
The CSP of latter type does not use any printed board or a film carrier for effecting plastic encapsulation or forming external terminals and hence is advantageous over a CSP of the former type.
Because of a difference in coefficient of linear expansion between the semiconductor chip 1 and the sealing resin 5, the conventional CSP of latter type encounters a structural problem of cracks being caused by a stress imposed on the posts 4.